vmm: Refactor IORT table generation to use structured data types #7589
+184
−63
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
The current IORT table implementation is based on IORT Spec revision E.b [1], as evidenced by: * The PCI root complex node revision being set to `3` * The code being updated in late 2021 [2] when revision E.b was the latest version This patch ensures the IORT table is properly generated according to this specification revision, fixing three issues: 1. The IORT table revision should be `3` rather than `2` (see Table 2 in the spec [1]) 2. The GIC ITS group node revision should be `1` rather than `0` (see Table 12 in the spec [1]) 3. The "Memory access properties" and "ATS Attribute" fields of the PCI root complex node was set incorrectly - specifically the MAF (Memory Access Flags) including CPM and DACS bits (see Tables 14, 15, and 17 in the spec [1]) [1] https://developer.arm.com/documentation/den0049/eb/?lang=en [2] cloud-hypervisor#3356 Signed-off-by: Bo Chen <bchen@crusoe.ai>
The IORT specification (Revision E.b, Table 12) defines the ITS Group Node structure with an ITS Identifiers array following the node header. Although the IORT table is zero-initialized, this commit adds an explicit write of the ITS identifier value (0) for clarity and spec compliance. This ITS identifier must match the `translation_id` field in the MADT GIC ITS structure to ensure proper interrupt routing on ARM platforms. Signed-off-by: Bo Chen <bchen@crusoe.ai>
The IORT table's ID mapping uses a 256-ID offset per PCI segment to ensure unique device IDs across all segments. This partitioning scheme (output_base = 256 * segment_id) must match the device ID encoding used in KVM MSI routing configuration [1]. This mapping assumes one bus per PCI segment, and supports up to 256 PCI segments in the system. [1] cloud-hypervisor@c9374d8 Signed-off-by: Bo Chen <bchen@crusoe.ai>
The current implementation is based on IORT spec revisition E.b [1]. [1] https://developer.arm.com/documentation/den0049/eb/?lang=en Fixes: cloud-hypervisor#7587 Signed-off-by: Bo Chen <bchen@crusoe.ai>
d379f72 to
947f15a
Compare
rbradford
reviewed
Jan 11, 2026
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Depends on: #7586
The current implementation is based on IORT spec revisition E.b [1].
[1] https://developer.arm.com/documentation/den0049/eb/?lang=en
Fixes: #7587