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Merge #652
652: H7: Add UART9/USART10 for RM0468 parts, fix base address for RM0455 parts r=adamgreig a=richardeoin RM0468: Base address RM0468 Rev 2 page 137 Interrupt offset RM0468 Rev 2 page 741 RM0455: Base address RM0455 Rev 6 page 133 Interrupt offset RM0455 Rev 6 page 722 Co-authored-by: Richard Meadows <962920+richardeoin@users.noreply.github.com>
2 parents 140a4a8 + bb60ad7 commit 44c254e

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2 files changed

+43
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devices/common_patches/h7_common_highmemory.yaml

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@@ -383,14 +383,14 @@ _add:
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value: 83
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UART9:
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derivedFrom: USART1
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baseAddress: 0x40018000
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baseAddress: 0x40011800
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interrupts:
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UART9:
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description: UART9 global interrupt
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value: 140
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USART10:
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derivedFrom: USART1
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baseAddress: 0x4001C000
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baseAddress: 0x40011C00
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interrupts:
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USART10:
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description: USART10 global interrupt

devices/stm32h735.yaml

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@@ -71,6 +71,20 @@ _add:
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BDMA_CH7:
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description: BDMA Channel 7 interrupt
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value: 136
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UART9:
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derivedFrom: USART1
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baseAddress: 0x40011800
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interrupts:
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UART9:
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description: UART9 global interrupt
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value: 155
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USART10:
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derivedFrom: USART1
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baseAddress: 0x40011C00
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interrupts:
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USART10:
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description: USART10 global interrupt
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value: 156
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# Additional timers
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TIM23:
@@ -698,12 +712,39 @@ RCC:
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APB2RSTR:
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_delete:
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- HRTIMRST
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_add:
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UART9RST:
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description: UART9 block reset
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bitWidth: 1
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bitOffset: 6
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USART10RST:
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description: USART10 block reset
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bitWidth: 1
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bitOffset: 7
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APB2ENR:
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_delete:
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- HRTIMEN
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_add:
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UART9EN:
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description: UART9 peripheral clocks enable
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bitWidth: 1
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bitOffset: 6
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USART10EN:
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description: USART10 peripheral clocks enable
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bitWidth: 1
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bitOffset: 7
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APB2LPENR,C1_APB2LPENR:
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_delete:
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- HRTIMLPEN
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_add:
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UART9LPEN:
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description: UART9 peripheral clocks enable during CSleep Mode
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bitWidth: 1
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bitOffset: 6
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USART10LPEN:
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description: USART10 peripheral clocks enable during CSleep Mode
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bitWidth: 1
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bitOffset: 7
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APB4RSTR:
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_add:
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DTSRST:

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